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19-3487; Rev 2; 4/05
10-Port Constant-Current LED Drivers and I/O Expanders with PWM Intensity Control
General Description
The MAX6966/MAX6967 serial-interfaced peripherals provide microprocessors with 10 I/O ports rated to 7V. Each port can be individually configured as either: * A 20mA constant-current LED driver (static or pulsewidth modulated (PWM)). * A 10mA constant-current LED driver (static or PWM). * An open-drain logic output. * An overvoltage-protected Schmitt logic input. Analog and switching LED intensity control is built in: * Individual 8-bit PWM control per output. * Individual 1-bit analog control (half/full) per output. * Global 3-bit analog control applies to all LED outputs. PWM timing of the 10 port outputs may be optionally staggered, consecutively phased in 45 increments. This spreads the PWM load currents over time in eight steps, helping to even out the power-supply current and reduce the RMS current. The MAX6966/MAX6967 can be configured to awake from shutdown on receipt of a minimum 3ms pulse on the CS input. This hardware-wakeup feature allows a power-management controller or similar ASIC to enable the MAX6966/MAX6967 with preconfigured LED intensity settings. Shutdown can be programmed to wait up to 4s, fade down the sink currents to zero for a period of 1/16s to 4s, and then shut down. A similar ramp-up from shutdown can be programmed for 1/16s to 4s. The MAX6966/MAX6967 support hot insertion. All port pins remain high impedance in power-down (V+ = 0V) with up to 8V asserted on them. The DOUT/OSC pin can be configured as either the serial interface data output or optional PWM clock input. The MAX6966 powers up defaulting as DOUT output. The MAX6967 defaults as OSC input. For a similar part without the constant-current controls, refer to the MAX7317 data sheet.
Features
High-Speed 26MHz SPI-TM/QSPI-TM/MICROWIRETMCompatible Serial Interface 2.25V to 3.6V Operation I/O Ports Default to High-Z (LEDs Off) on Power-Up I/O Port Inputs Are Overvoltage Protected to 7V I/O Port Outputs Are 7V-Rated Open Drain I/O Port Outputs Are 10mA or 20mA ConstantCurrent Static/PWM LED Drivers, or Open-Drain Logic Outputs I/O Ports Support Hot Insertion Individual 8-Bit PWM Intensity Control for Each LED Any Output May Use or Not Use PWM Control Exit Shutdown (Warm Start) with Simple CS Pulse Auto Ramp-Down into Shutdown Auto Ramp-Up Out from Shutdown 0.8A (typ), 2A (max) Shutdown Current Tiny 3mm x 3mm, 0.8mm High Thin QFN Package -40C to +125C Temperature Range
MAX6966/MAX6967
Ordering Information
PART TEMP RANGE -40C to +125C -40C to +125C -40C to +125C -40C to +125C PINPACKAGE 16 Thin QFN 3mm x 3mm x 0.8mm 16 QSOP 16 Thin QFN 3mm x 3mm x 0.8mm 16 QSOP TOP MARK ACF PKG CODE T1633-4
MAX6966ATE
MAX6966AEE
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MAX6967ATE
ACG
T1633-4
Applications
LCD Backlights Keypad Backlights LED Status Indication RGB LED Drivers Portable Equipment Cellular Phones
MAX6967AEE
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SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp. ________________________________________________________________ Maxim Integrated Products 1
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10-Port Constant-Current LED Drivers and I/O Expanders with PWM Intensity Control MAX6966/MAX6967
ABSOLUTE MAXIMUM RATINGS
Voltage (with respect to GND) V+ .............................................................................-0.3V to +4V SCLK, DIN, CS, DOUT/OSC.........................-0.3V to (V+ + 0.3V) P_ .............................................................................-0.3V to +8V DC Current into P_ .............................................................24mA DC Current into DOUT/OSC................................................10mA Total GND Current ............................................................280mA Continuous Power Dissipation 16-Pin QSOP (derate 8.3mW/C over TA = +70C) ....667mW 16-Pin QFN (derate 14.7mW/C over TA = +70C) ...1176mW Operating Temperature Range (TMIN to TMAX) .-40C to +125C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(Typical Operating Circuit, V+ = 2.25V to 3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = 3.3V, TA = +25C.) (Note 1)
PARAMETER Operating Supply Voltage Output Load External Supply Voltage P0-P9 Standby Current (Interface Idle, CS Run Disabled, PWM Disabled, All Ports High Impedance) Supply-Current Interface Only (CS Run Enabled, PWM Disabled, All Ports High Impedance) Delta Supply Current per 10mA Port (Interface Idle, Global Current Register Set to 0x07, One Port's Output Register Set to 0x02 and Its Output Current Register Bit Cleared; All Other Ports' Output Registers Set to 0x00, 0x01, or 0xFF) Delta Supply Current per 20mA Port (Interface Idle, Global Current Register Set to 0x07, One Port's Output Register Set to 0x02 and Its Output Current Register Bit Set; All Other Ports' Output Registers Set to 0x00, 0x01, or 0xFF) SYMBOL V+ VEXT TA = +25C ISTBY CS at V+; other digital inputs at V+ or GND TA= TMIN to +85C TA= TMIN to TMAX fSCLK = 26MHz, other digital inputs at V+ or GND; DOUT unloaded TA = +25C TA = TMIN to +85C TA = TMIN to TMAX TA = +25C I+10 Digital inputs at V+ or GND 1.58 390 0.7 CONDITIONS MIN 2.25 TYP MAX 3.60 7 1.5 1.7 1.9 620 680 730 1.8 A A UNITS V V
I+
TA = TMIN to +85C
1.9
mA
TA = TMIN to TMAX
2
TA = +25C I+20 Digital inputs at V+ or GND TA = TMIN to +85C
3.2
3.6
3.8
mA
TA = TMIN to TMAX
4.0
2
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10-Port Constant-Current LED Drivers and I/O Expanders with PWM Intensity Control
ELECTRICAL CHARACTERISTICS (continued)
(Typical Operating Circuit, V+ = 2.25V to 3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = 3.3V, TA = +25C.) (Note 1)
PARAMETER Input High Voltage (P0-P9, DIN, SCLK, CS, OSC) Input Low Voltage (P0-P9, DIN, SCLK, CS, OSC) Input Leakage Current (P0-P9, DIN, SCLK, CS, OSC) Input Capacitance (P0-P9, DIN, SCLK, CS, OSC) Port Nominal Sink Constant Current (P0-P9) (Global Current Register Set to 0x07) Port Logic Output Low Voltage (P0-P9) Port Logic Output Low ShortCircuit Current (P0-P9) Port Slew Time Port Sink Constant-Current Matching SYMBOL VIH VIL IIH, IIL (Note 2) Output register set to 0x02, V+ = 3.3V, VEXT - VLED = 1V to 2.5V (Note 3) Output register set to 0x00, ISINK = 0.5mA Output register set to 0x00, VOLP_ = 5V From 20% current to 80% current TA = +25C, V+ = 3.3V, VEXT - VLED = 1.4V, IOUT = 20mA TA = +25C, V+ = 3.3V, VEXT - VLED = 1.4V, IOUT = 10mA ISOURCE = 6mA ISINK = 6mA V+ 0.3V 0.3 10.8 2 1.5 2 4 % 5 V V TA = +25C TA = TMIN to +85C 19.3 9.5 18.8 9.1 CONDITIONS P0-P9: output register set to 0x01 P0-P9: output register set to 0x01 -0.2 10 20 10 21.1 10.7 21.8 11.0 0.4 20 V mA s mA MIN 0.7 x V+ 0.3 x V+ +0.2 TYP MAX UNITS V V A pF
MAX6966/MAX6967
IOUT
VOLP_
IOUT
Output High Voltage (DOUT) Output Low Voltage (DOUT)
VOHDOUT VOLDOUT
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10-Port Constant-Current LED Drivers and I/O Expanders with PWM Intensity Control MAX6966/MAX6967
TIMING CHARACTERISTICS
(Typical Operating Circuit, V+ = 2.25V to 3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = 3.3V, TA = +25C.) (Note 1)
PARAMETER Internal PWM Clock Frequency External PWM Clock Frequency SCLK Clock Period SCLK Pulse Width High SCLK Pulse Width Low CS Fall to SCLK Rise Setup Time SCLK Rise to CS Rise Hold Time DIN Setup Time DIN Hold Time Output Data Propagation Delay DOUT Output Rise and Fall Times Minimum CS Pulse High CS Pulse Low to Not Activate CS Run CS Pulse Width to Activate CS Run SYMBOL fINT fOSC tCP tCH tCL tCSS tCSH tDS tDH tDO tFT tCSW tCSRUN tCSRUN CS run enabled CS run enabled 3 CLOAD = 20pF 38.4 640 38.4 19 19 9.5 0 9.5 0 21 10 CONDITIONS MIN 27000 TYP MAX 45000 100 UNITS Hz kHz ns ns ns ns ns ns ns ns ns ns s ms
Note 1: All parameters tested at TA = +25C. Specifications over temperature are guaranteed by design. Note 2: Guaranteed by design. Note 3: Port current is factory trimmed to meet a median sink current of 20mA and 10mA over all 10 ports. The IOUT specification guarantees current matching between ports.
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10-Port Constant-Current LED Drivers and I/O Expanders with PWM Intensity Control
Typical Operating Characteristics
(TA = +25C, unless otherwise noted.)
MAX6966/MAX6967
STANDBY CURRENT (ISTBY1) vs. TEMPERATURE
MAX6966/67 toc01
SUPPLY CURRENT (I+) vs. TEMPERATURE
MAX6966/67 toc02
OUTPUT SINKING CURRENT vs. VEXT - VLED AT 10mA
MAX6966/67 toc03
1.2 1.1 STANDBY CURRENT (A) 1.0 V+ = 3.3V 0.9 V+ = 2.7V 0.8 0.7 0.6 0.5 0.4 V+ = 2.25V V+ = 3.6V
0.5 V+ = 3.6V 0.4 SUPPLY CURRENT (mA) V+ = 3.3V
14 OUTPUT SINKING CURRENT (mA) 12 10 8 6 4 2
0.3 V+ = 2.7V 0.2 V+ = 2.25V 0.1
0 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C) -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C)
0 0 1 2 3 4 5 VEXT - VLED (V)
OUTPUT SINKING CURRENT vs. VEXT - VLED AT 20mA
MAX6966/67 toc04
INTERNAL OSCILLATOR FREQUENCY vs. TEMPERATURE
43 41 FREQUENCY (kHz) 39 37 35 33 31 V+ = 2.7V V+ = 2.25V V+ = 3.6V V+ = 3.3V
MAX6966/67 toc05 MAX6966/67 toc07
24 OUTPUT SINKING CURRENT (mA) 20 16 12 8 4 0 0 1 2 3 4 5 VEXT - VLED (V)
45
29 27 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C)
SAMPLE PWM WAVEFORMS
MAX6966/67 toc06
STAGGER PWM PORT WAVEFORMS (OUTPUT REGISTERS SET TO 0x80)
OUTPUT REGISTER = 0x03 OUTPUT REGISTER = 0x80
PORT P4
PORT P0
OUTPUT REGISTER = 0xFE
PORT P1
2ms
2ms
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10-Port Constant-Current LED Drivers and I/O Expanders with PWM Intensity Control MAX6966/MAX6967
Pin Description
PIN QSOP 1 2 3-7, 9-13 8 TQFN 15 16 1-5, 7-11 6 NAME SCLK CS FUNCTION Serial-Clock Input. On SCLK's rising edge, data shifts into the internal shift register. On SCLK's falling edge, data is clocked out of DOUT. SCLK is active only while CS is low. Chip-Select Input. Serial data is loaded into the shift register while CS is low. The most recent 16 bits of data latch on CS's rising edge. I/O Ports. P0 to P9 can be configured as open-drain current-sink outputs rated at 20mA maximum, or as CMOS-logic inputs, or as open-drain logic outputs. Loads should be connected to a supply voltage no higher than 7V. Ground Serial-Data Output. The data into DIN is valid at DOUT 15.5 clock cycles later. Use this pin to daisy-chain several devices or allow data readback. Output is push-pull. OSC Input. Apply a square-wave CMOS clock up to 100kHz as alternate PWM clock source. The MAX6966 powers up with DOUT/OSC defaulting as DOUT output. The MAX6967 powers up with DOUT/OSC defaulting as OSC input. Serial-Data Input. Data from DIN loads into the internal 16-bit shift register on SCLK's rising edge. Positive Supply Voltage. Bypass V+ to GND with a 0.1F ceramic capacitor. Exposed Pad on Package Underside. Connect to GND.
P0-P9 GND
14
12
DOUT/OSC
15 16 --
13 14 PAD
DIN V+ Exposed pad
Quick-Start Guide
This section describes how to configure a MAX6966 or MAX6967 on power-up. Software engineers can use this section as a plain-text guide to the device's initialization routine. Hardware engineers can use this section to get a quick overview of the device's capabilities and feature tradeoffs: 1) Before power-up, all 10 I/O ports P0 to P9 are high impedance. They may be connected to inputs up to +7V or loads connected to independent rails up to +7V. The SPI bus inputs (SCLK, CS, DIN) are not overvoltage protected, and must not be driven from a voltage higher than V+. 2) After power-up, all 10 I/O ports P0 to P9 remain high impedance. They may be connected to inputs up to +7V or loads connected to V+ or independent rails up to +7V. The ports are not configured as logic inputs even though the ports are high impedance. The device is in shutdown mode, and draws minimum supply current regardless of I/O ports connections. 3) Decide whether the DOUT/OSC pin will be used as SPI data output or PWM clock input, and choose the MAX6966 or MAX6967 accordingly. If
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any ports are used as logic input, or if the application needs read-after-write validation, then DOUT/OSC needs to be configured as DOUT. Note that both the MAX6966 and MAX6967 can configure DOUT/OSC as either DOUT output or OSC clock input; the only difference is the power-up default. 4) Allocate port functionality for the 10 I/O ports. All ports have the same features, so allocate ports for either software convenience or board-routing reasons. Any port can be constant-current LED drivers (static or PWM), an open-drain logic output, or a logic input. If fewer than 10 ports are used as constant-current drivers, see the Applications Information section for details on how to optimize the PWM phasing to minimize load supply-current modulation. 5) Decide how to implement LED intensity control. The MAX6966/MAX6967 provide: * Individual 8-bit PWM control per constant-current output * Individual 1-bit analog control (half/full) per constant-current output * Global 3-bit analog control, which applies to all constant-current outputs
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10-Port Constant-Current LED Drivers and I/O Expanders with PWM Intensity Control
The tradeoff for LED intensity control is between depth of current-control resolution, noise constraints, and software complexity: * For high LED resolution where each LED needs individual intensity settings, use the 8-bit PWM control plus the 1-bit analog control to get 9 bits of individual LED intensity control. * For absolute maximum LED resolution where the LED uses the same intensity settings, use the 8bit PWM control plus the 1-bit analog control, plus the global 3-bit analog control to get 12 bits of LED intensity control. * For lowest noise applications where PWM cannot be used, 1 bit of individual analog control is available. If all LEDs use the same intensity settings, the 1-bit analog control plus the global 3bit analog control provide 4 bits of static LED intensity control. * If the standard half/full constant-current settings of 10mA/20mA are not acceptable, then the global 3-bit analog control can be used to reduce the currents for all the constant-current outputs. 6) Take care with PC board layout. The MAX6966/ MAX6967 are switching moderate currents in PWM applications, so the MAX6966/MAX6967 and the load supplies need careful decoupling to minimize conducted noise. Also, the serial interface is fast, so simple overshoot-damping terminations may be required if the tracks are long.
MAX6966/MAX6967
Detailed Description
The MAX6966/MAX6967 are general-purpose input/output (GPIO) peripherals that provide 10 I/O ports, P0 to P9, controlled through a high-speed SPI-compatible serial interface. The 10 I/O ports can be used as logic inputs, open-drain logic outputs, or constant-current sinks in any combination. Ports withstand 7V independent of the MAX6966's or MAX6967's supply voltage whether used as logic inputs, logic outputs, or constant-current sinks. Ports configured as constant-current outputs can be set to sink either a constant current of either 10mA or 20mA. The static port current may be PWM with a duty cycle ranging from 3/256 to 254/256 to reduce the average current, or remain static. Ports configured as open-drain logic outputs have a relatively weak sink capability, which should still be adequate for normal logic-level outputs. Open-drain logic outputs typically require external pullup resistors to the appropriate positive supply to provide the logichigh reference. The weak drive means that the shortcircuit current is low enough that inadvertently driving an LED from a port configured as a logic output is unlikely to damage the LED. The MAX6966/MAX6967 are rated for all 10 outputs to carry their maximum 20mA loads at the same time. The port configuration options are shown in Table 1.
Table 1. Port Configuration Options
PORT TYPE Low-logic output High-logic output Logic input Constantcurrent static sink output Constantcurrent PWM output LED off 0x02 OUTPUT REGISTER CODE 0x00 BEHAVIOR OUT OF SHUTDOWN (CONFIGURATION REGISTER BIT D0 = 1) BEHAVIOR IN SHUTDOWN (CONFIGURATION REGISTER BIT D0 = 0) APPLICATION NOTES
Logic-low output, not constant current Logic-high output with external pullup resistor; otherwise, high impedance CMOS logic input Static constant-current sink output High impedance Full constant-current drive with no PWM noise Lowest supply current unaffected by shutdown
0x01
0x03-0xFE
PWM constant-current sink output Logic-high output with external pullup resistor; otherwise, high impedance
Adjustable constant current
0xFF
LED off
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10-Port Constant-Current LED Drivers and I/O Expanders with PWM Intensity Control MAX6966/MAX6967
I/O PORT A B
POSITION A: 0x00 - 0x01 POSITION B: 0x02 - 0xFF CLOSE SWITCH: 0x02-0xFE 8-BIT LATCH OUTPUT PORT REGISTER PWM GENERATOR ENABLE TO/FROM SERIAL INTERFACE 1-BIT LATCH OUTPUT CURRENT REGISTER MSB SET CURRENT 4-BIT DAC 3-BIT LATCH GLOBAL CURRENT REGISTER ENABLE = 0x00
N
READ I/O PORT COMMAND
Figure 1. Simplified Schematic of I/O Ports
Figure 1 shows the I/O port structure of the MAX6966/ MAX6967. I/O ports P0 to P9 default to high impedance on power-up, so LED or other port loads connected draw no current, and ports used as inputs do not load their source signals.
and off through the serial interface, as well as by the PWM intensity control.
Shutdown Mode
In shutdown mode, all ports configured as constant-current outputs (output register set to a value between 0x02 and 0xFE) are switched off, and these outputs go high impedance as if their registers were set to value 0xFF. Ports configured as logic inputs or outputs (output registers set to value 0x00 or 0x01) are unaffected (Table 1). This means that any ports used for GPIOs are still fully operational in shutdown mode, and port inputs can be read and output ports can be toggled at any time using the serial interface. The MAX6966/MAX6967 can therefore be used for a mix of logic inputs, logic outputs, and PWM LED drivers, and only the LED drivers are turned off automatically in shutdown. The MAX6966/MAX6967 are put into shutdown mode by clearing the run bit (bit D0) in the configuration register (Table 4). Shutdown is exited by setting the run bit through the serial interface, or by using the CS run option discussed below. The MAX6966/MAX6967 can be configured and controlled in the normal way through the serial interface in shutdown mode. All registers are accessible in shutdown mode, and no register is changed by shutdown mode. When shutdown mode is exited, ports configured as constant-current outputs at that time start instantly with their current PWM values.
Standby Mode and Operating Current
When all the ports are configured as logic inputs or outputs (all output registers set to value 0x00 or 0x01) or LED off (output register set to value 0xFF), the MAX6966/MAX6967 operate at their lowest supply current, called standby mode. When PWM intensity control is used (one or more output registers set to a value between 0x03 and 0xFE), the operating current increases because the internal PWM circuitry is running. The operating current also increases whenever a port that is set is active low as a constant-current output (output register set to a value between 0x02 and 0xFE), even if a load is not applied to the port. This current increase is due to an internal current mirror being enabled for that port output to provide the accurate constant-current sink. There is a gated mirror for each output, and each mirror is only enabled when required. When PWM is used, a current mirror is only turned on for the output's on-time. This means that operating current varies as constant-current outputs are turned on
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10-Port Constant-Current LED Drivers and I/O Expanders with PWM Intensity Control
If a port is changed from static logic low (0x00) or static logic high (0x01) to a constant-current value (0x02-0xFE) in shutdown mode, then that output is automatically turned off (logic high, or high impedance) like any other constant-current outputs that are disabled in shutdown. When shutdown mode is exited, the new constant-current output starts just like any other constant-current outputs. If a port is changed from a constant-current value (0x02-0xFE) to static logic low (0x00) or static logic high (0x01) in shutdown mode, then that output is instantly set to that value as a GPIO output. When shutdown mode is exited, the new GPIO output is unaffected just like any other GPIO outputs. The maximum pulse on CS to ensure that CS run is not triggered (when enabled) is 255 periods of the PWM clock. For the internal oscillator, this time is 255 / 45000 = 5.66ms. Since a transmission on the serial interface comprises 16 clocks with CS low, a minimum 2.83kHz SCLK frequency ensures that CS run is not triggered. For the external PWM clock, this time is 255 / OSC and has a shortest time of 2.55ms when OSC is set to the maximum allowed frequency of 100kHz. The SPI serial interface circuitry is independent of the CS run circuitry. Activity on SCLK and DIN is ignored by the CS run circuitry. A slow SPI transmission to the MAX6966/MAX6967 can therefore be used as both a valid data transmission (read or write), and as a means for exiting shutdown. The CS run action (i.e., setting the run bit in the configuration register) occurs before any coincident data transmission is processed. This means that a slow transmission containing a write command to the configuration register clearing the run bit would work, since the write command is implemented internally after the CS run action that sets the run bit. The "slow transmission" cut-off data rate is expected to be lower than the SPI interface speed in the majority of applications. If this is not the case, the CS run option can still be used. Consider the situation when the MAX6966/MAX6967 have been put into shutdown with the CS run option enabled. The application uses the MAX6966/MAX6967 with some ports configured as logic inputs or outputs, which need to be accessed in shutdown. The SPI interface speed is slow, so any transmission brings the MAX6966/MAX6967 out of shutdown. So, how are the I/O ports accessed in shutdown? The solution is to write the configuration register disabling CS run (bit D1 = 0) and invoking shutdown (bit D0 = 0) as the first command. Now any other registers can be accessed while the MAX6966/MAX6967 remain in shutdown. Finally, write the configuration register reenabling CS run (bit D1 = 1) and invoking shutdown (bit D0 = 0) to restore the original status.
MAX6966/MAX6967
CS Run Option
The MAX6966/MAX6967 can be configured so that a relatively long pulse on the CS input brings the driver out of shutdown, as an alternative method to the normal method of writing the configuration register through the serial interface. When the CS run option is enabled, a minimum pulse on CS sets the run bit in the configuration register, bringing the driver out of shutdown and activating any preconfigured ramp-up. Also, the SPI interface must be operated at a minimum data rate to ensure that a normal active-low CS pulse during a 16bit regular data transmission is not mistaken for a CS run command. The CS run timing uses the PWM clock, which is either the internal nominal 32kHz oscillator or a user-provided clock fed into the dual-use DOUT/OSC pin (see the PWM Clock section for details on configuring the PWM clock). The minimum pulse on CS to trigger CS run and bring the driver out of shutdown is 256 to 257 periods of the PWM clock. For the internal oscillator, this time is 257 / 27000 = 9.52ms. For the external PWM clock, this time is 257 / OSC and has a shortest possible time of 2.57ms when OSC is set to the maximum allowed 100kHz frequency.
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10-Port Constant-Current LED Drivers and I/O Expanders with PWM Intensity Control MAX6966/MAX6967
Register Structure
The MAX6966/MAX6967 contain 16 internal registers, addressed as 0x00-0x09, and 0x10-0x15, which configure and control the peripheral (Table 2). Two addresses, 0x0E and 0x0F, do not store data but return the port input status when read. Four virtual addresses, 0x0A-0x0D allow more than one register to be written with the same data to simplify software. The no-op address, 0x20, causes no action when written or read, and is used as a dummy register when accessing one MAX6966/MAX6967 out of multiple cascaded devices.
Table 2. Register Address Map
REGISTER Port P0 output level or PWM Port P1 output level or PWM Port P2 output level or PWM Port P3 output level or PWM Port P4 output level or PWM Port P5 output level or PWM Port P6 output level or PWM Port P7 output level or PWM Port P8 output level or PWM Port P9 output level or PWM Write ports P0 through P9 with same output level or PWM Read port P0 output level or PWM Write ports P0 through P3 with same output level or PWM Read port P0 output level or PWM Write ports P4 through P7 with same output level or PWM Read port P4 output level or PWM Write ports P8 or P9 with same output level or PWM Read port P8 output level or PWM Read ports P7 through P0 inputs Read ports P9 and P8 inputs Configuration Ramp-down Ramp-up Output current ISET70 Output current ISET98 Global current No-op Factory reserved; do not write to this register COMMAND ADDRESS D15 R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 0 1 0 1 0 1 0 1 1 1 R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 1 0 0 0 1 1 1 1 1 1 0 1 1 1 1 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 0 1 0 1 1 0 0 1 1 0 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0x0D 0x0E 0x0F 0x10 0x11 0x12 0x13 0x14 0x15 0x20 0x7D 0 0 0 1 1 0 0 0x0C 0 0 0 1 0 1 1 0x0B D14 0 0 0 0 0 0 0 0 0 0 0 D13 0 0 0 0 0 0 0 0 0 0 0 D12 0 0 0 0 0 0 0 0 0 0 0 D11 0 0 0 0 0 0 0 0 1 1 1 D10 0 0 0 0 1 1 1 1 0 0 0 D9 0 0 1 1 0 0 1 1 0 0 1 D8 0 1 0 1 0 1 0 1 0 1 0 HEX CODE 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A
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10-Port Constant-Current LED Drivers and I/O Expanders with PWM Intensity Control
Initial Power-Up On power-up, all control registers are reset (Table 3). Power-up status sets I/O ports P0 to P9 high impedance, and puts the device into shutdown mode. This means that any LED (or other) loads are effectively turned off, and the MAX6966/MAX6967 start in its lowest power condition. lator and PWM logic are disabled automatically, and the MAX6966/MAX6967 operating current is lowest. The internal 32kHz oscillator can be replaced by a user clock up to 100kHz if a precise or synchronized PWM frequency source is desired. The clock is fed into the dual-use DOUT/OSC pin, which is switched between a port output and a clock input using the OSC bit in the configuration register (Table 4).
MAX6966/MAX6967
PWM Clock
An internal 32kHz oscillator generates PWM timing. If all output ports are set to static levels, the internal oscil-
Table 3. Initial Power-Up Register Status
REGISTER Port P0 output level or PWM Port P1 output level or PWM Port P2 output level or PWM Port P3 output level or PWM Port P4 output level or PWM Port P5 output level or PWM Port P6 output level or PWM Port P7 output level or PWM Port P8 output level or PWM Port P9 output level or PWM Configuration (MAX6966 only) POWER-UP CONDITION Port 0 high impedance Port 1 high impedance Port 2 high impedance Port 3 high impedance Port 4 high impedance Port 5 high impedance Port 6 high impedance Port 7 high impedance Port 8 high impedance Port 9 high impedance Shutdown mode, CS run disabled, DOUT/OSC is DOUT output 0x10 Configuration (MAX6967 only) Ramp-down Ramp-up Output current ISET70 Output current ISET98 Global current Shutdown mode, CS run disabled, DOUT/OSC is OSC input Fade disabled -- IPEAK = 10mA for ports P7-P0 IPEAK = 10mA for ports P9, P8 Full current 0x11 0x12 0x13 0x14 0x15 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 1 ADDRESS CODE (HEX) 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 REGISTER DATA D7 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 D6 1 1 1 1 1 1 1 1 1 1 D5 1 1 1 1 1 1 1 1 1 1 D4 1 1 1 1 1 1 1 1 1 1 D3 1 1 1 1 1 1 1 1 1 1 D2 1 1 1 1 1 1 1 1 1 1 D1 1 1 1 1 1 1 1 1 1 1 D0 1 1 1 1 1 1 1 1 1 1
______________________________________________________________________________________
11
10-Port Constant-Current LED Drivers and I/O Expanders with PWM Intensity Control MAX6966/MAX6967
PWM Timing and Phasing
A PWM period comprises 256 cycles of the nominal 32kHz PWM clock (Figure 2). Ports can be set individually to a PWM duty between 3/256 and 254/256. PWM timing can be configured one of two ways by the setting of the stagger bit in the configuration register (Table 4). When the stagger bit is clear, all outputs using PWM switch at the same time use the timing shown in Figure 2. All outputs therefore draw load current at exactly the same time for the same PWM setting. This means
OUTPUT REGISTER VALUE 0x00 7.8125ms NOMINAL PWM PERIOD HIGH-Z OUTPUT STATIC-LOW LOGIC DRIVE WITH INPUT BUFFER ENABLED (GPI) LOW HIGH-Z 0x01 OUTPUT STATIC-HIGH LOGIC DRIVE WITH INPUT BUFFER ENABLED (GPI) LOW HIGH-Z 0x02 OUTPUT STATIC-LOW CONSTANT CURRENT WITH INPUT BUFFER DISABLED (STATIC LED DRIVE ON) LOW HIGH-Z 0x03 OUTPUT LOW 3/256 DUTY CONSTANT CURRENT WITH INPUT BUFFER DISABLED (PWM LED DRIVE) LOW HIGH-Z 0x04 OUTPUT LOW 4/256 DUTY CONSTANT CURRENT WITH INPUT BUFFER DISABLED (PWM LED DRIVE) LOW
that if, for example, all outputs are set to 128/256 duty cycle, the current draw would be zero (all loads off) for half the time and full (all loads on) for the other half. When the stagger bit is set, the PWM timing of the 10 port outputs is staggered by 32 counts of the 256-count PWM period (i.e., 1/8), distributing the port output switching points across the PWM period (Figure 3). The staggering reduces the di/dt output-switching transient on the supply, and also reduces the peak/mean current requirement.
0xFC
OUTPUT LOW 252/256 DUTY CONSTANT CURRENT WITH INPUT BUFFER DISABLED (PWM LED DRIVE)
HIGH-Z LOW
OUTPUT LOW 253/256 DUTY CONSTANT CURRENT WITH INPUT BUFFER DISABLED (PWM LED DRIVE) 0xFD
HIGH-Z LOW
0xFE
OUTPUT LOW 254/256 DUTY CONSTANT CURRENT WITH INPUT BUFFER DISABLED (PWM LED DRIVE)
HIGH-Z LOW HIGH-Z
0xFF
OUTPUT STATIC HIGH IMPEDANCE WITH INPUT BUFFER DISABLED (STATIC LED DRIVE OFF)
LOW
Figure 2. Static and PWM Constant-Current Waveforms
7.8125ms NOMINAL PWM PERIOD
NEXT PWM PERIOD
NEXT PWM PERIOD
0
32
64
96
128
160
192
224
256
OUTPUTS P0, O8 IN-PHASE PWM PERIOD OUTPUTS P0, O8 IN-PHASE PWM PERIOD OUTPUTS P0, O8 IN-PHASE PWM PERIOD OUTPUT P1, O9 STAGGERED PWM PERIOD OUTPUT P1, O9 STAGGERED PWM PERIOD OUTPUT P1, O9 STAGGERED PWM PERIOD OUTPUT P2 STAGGERED PWM PERIOD OUTPUT P2 STAGGERED PWM PERIOD OUTPUT P3 STAGGERED PWM PERIOD OUTPUT P3 STAGGERED PWM PERIOD OUTPUT P4 STAGGERED PWM PERIOD OUTPUT P4 STAGGERED PWM PERIOD OUTPUT P5 STAGGERED PWM PERIOD OUTPUT P5 STAGGERED PWM PERIOD OUTPUT P6 STAGGERED PWM PERIOD OUTPUT P6 STAGGERED PWM PERIOD OUTPUT P7 STAGGERED PWM PERIOD OUTPUT P7 STAGGERED PWM PERIOD
Figure 3. Staggered PWM Waveform 12 ______________________________________________________________________________________
10-Port Constant-Current LED Drivers and I/O Expanders with PWM Intensity Control MAX6966/MAX6967
Table 4. Configuration Register
REGISTER R/W ADDRESS CODE (HEX) REGISTER DATA D7 DOUT /OSC D6 D5 PWM stagger D4 Holdoff status D3 D2 D1 D0
CONFIGURATION
X
Write device configuration
0 OSC X Stagger 0x10 Holdoff
Read-back device configuration Shutdown mode (CS run disabled) Put or keep device in shutdown, disable CS run Shutdown mode (CS run enabled) Put or keep device in shutdown, enable CS run Run mode (device is currently in run mode) Run (exit shutdown) without ramp-up (device is currently in shutdown); bring device out of shutdown instantly, ignoring fade register setting Run (exit shutdown) with ramp-up (device is currently in shutdown); bring device out of shutdown using fade register ramp-up setting Run (abort shutdown sequence) (device is currently in hold-off/fade-off sequence to shutdown); bring device out of shutdown instantly, ignoring fade register setting Status: shutdown mode Status: in fade-off sequence to shutdown mode Status: in hold-off sequence to shutdown mode Status: run mode Status: in ramp-up sequence to run mode PWM outputs are in phase PWM outputs stagger phase DOUT/OSC is DOUT output, PWM clock source is internal oscillator DOUT/OSC is OSC input, PWM clock source is OSC
1
RampFadeup Shutdown/ off CS run run enable/ status status Rampup Fade- enable CS run Run off Rampup status X X 0 0
0
X
X
X
X
0 0
X X
X X
X X
X 0*
X 0*
X X
1 X
0 1
0
X
X
X
0*
0*
0
X
1
0
X
X
X
0* 0* 1*
0* 1* 0*
1
X
1
0
X
X
X 1
*
1 1
*
X
1
1 1 1 1 1 X X X X
X X X X X X X 0 1
X X X X X X X X X
Stagger Stagger Stagger Stagger Stagger 0 1 X X
0 0 1 0 0 X X X X
0 1 0 0 0 X X X X
0 0 0 0 1 X X X X
CS run CS run CS run CS run CS run X X X X
0 0 0 1 1 X X X X
*Current read status of this bit. ______________________________________________________________________________________ 13
10-Port Constant-Current LED Drivers and I/O Expanders with PWM Intensity Control MAX6966/MAX6967
The stagger bit is ideally set or cleared when the MAX6966/MAX6967 are in shutdown. If not, there may be a perceived transient flicker in any PWM-controlled LEDs because the fundamental PWM timing is being changed.
Output Registers and PWM Intensity Control
The MAX6966/MAX6967 use one 8-bit register to control each output port (Table 6). Each port may be configured as a logic input, open-drain logic output, or constant-current sink with programmable current and PWM duty cycle. Ports withstand 7V independent of the MAX6966's or MAX6967's supply voltage, whether used as logic inputs, logic outputs, or constant-current sinks. Ports configured as constant-current outputs sink a constant current set by the output current registers (Table 7) and the global current registers (Table 8). This current may be PWM with a duty cycle ranging from 3/256 to 254/256 to reduce the average current, or remain static. The 10 registers 0x00 through 0x09 control an I/O port each (Table 6). Five pseudo-register addresses, 0x0B through 0x0F, allow groups of outputs to be set to the same value with a single command by writing the same data to multiple output registers. PWM timing for LED intensity control is generated using either the internal 32kHz oscillator, or an external clock on DOUT/OSC. The PWM clock source is selected by configuration register bit D7 (Table 4). The MAX6966 powers up configured to use the internal 32kHz oscillator by default. The MAX6967 powers up configured to use the external clock source by default.
Configuration Register
The configuration register is used to select PWM phasing between outputs, test fade status, enable hardware startup from shutdown, and select shutdown or run mode (Table 4).
GPIO Port Direction Configuration
The 10 I/O ports P0 through P9 can be configured to any combination of logic inputs, logic outputs, and constant-current outputs. Configure any port as a logic input by setting its output register to 0x01, which sets the port output high impedance (Table 6).
Input Ports Registers
Reading an input port register returns the logic levels at the I/O port pins for ports that have been configured as a logic input (Table 5). A port is configured as a logic input by writing 0x01 to the port's output register (Table 5). An input ports register returns logic 0 in the appropriate bit position for a port not configured as a logic input. The input ports registers are read only. A write to an input ports register is ignored.
Table 5. Input Ports Register
REGISTER Read input ports P7-P0 Read input ports P9-P8 R/W 1 1 ADDRESS CODE (HEX) 0x0E 0x0F REGISTER DATA D7 Port P7 0 D6 Port P6 0 D5 Port P5 0 D4 Port P4 0 D3 Port P3 0 D2 Port P2 0 D1 Port P1 Port P9 D0 Port P0 Port P8
14
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10-Port Constant-Current LED Drivers and I/O Expanders with PWM Intensity Control MAX6966/MAX6967
Table 6. Output Registers Format
REGISTER PORT P0 LEVEL OR PWM Port P0 is static-low logic-level logic port with logic input buffer enabled; reading this port returns 0. Still active in shutdown. Port P0 is static-high logic-level logic port (high impedance without external pullup) or logic input with logic input buffer enabled; reading this port returns 0 or 1, depending on external conditions. Still active in shutdown. Port P0 is static-low constant-current sink (PWM disabled). Logic input buffer is disabled; reading this port always returns 0. High impedance in shutdown. Port P0 duty cycle is 3/256 current sink. GPI logic input buffer is disabled; reading this port always returns 0. High impedance in shutdown. Port P0 duty cycle is 4/256 current sink. GPI logic input buffer is disabled; reading this port always returns 0. High impedance in shutdown. -- Port P0 duty cycle is 253/256 current sink. GPI logic input buffer is disabled; reading this port always returns 0. High impedance in shutdown. Port P0 duty cycle is 254/256 current sink. GPI logic input buffer is disabled; reading this port always returns 0. High impedance in shutdown. Port P0 is static high impedance (PWM disabled). GPI logic input buffer is disabled; reading this port always returns 0. High impedance in shutdown. R/W X ADDRESS CODE (HEX) REGISTER DATA BINARY D7 MSB D6 D5 D4 D3 D2 D1 D0 LSB OUTPUT P0 LEVEL AND PWM HEX
X
0
0
0
0
0
0
0
0
0x00
X
0
0
0
0
0
0
0
1
0x01
X
0
0
0
0
0
0
1
0
0x02
X 0x00 X
0
0
0
0
0
0
1
1
0x03
0
0
0
0
0
1
0
0
0x04
X
--
--
--
--
--
--
--
--
--
X
1
1
1
1
1
1
0
1
0xFD
X
1
1
1
1
1
1
1
0
0xFE
X
1
1
1
1
1
1
1
1
0xFF
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15
10-Port Constant-Current LED Drivers and I/O Expanders with PWM Intensity Control MAX6966/MAX6967
Table 6. Output Registers Format (continued)
REGISTER DATA REGISTER R/W ADDRESS CODE (HEX) BINARY D7 MSB Port P1 level or PWM Port P2 level or PWM Port P3 level or PWM Port P4 level or PWM Port P5 level or PWM Port P6 level or PWM Port P7 level or PWM Port P8 level or PWM Port P9 level or PWM Writes ports P0 through P9 with same level or PWM Reads port P0 level or PWM Writes ports P0 through P3 with same level or PWM Reads port P0 level or PWM Writes ports P4 through P7 with same level or PWM Reads port P4 level or PWM Write ports P8 and P9 with same level or PWM Reads port P8 level or PWM X X X X X X X X X 0 1 0 1 0 1 0 1 0x0D 0x0C 0x0B 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A MSB MSB MSB MSB MSB MSB MSB MSB MSB MSB MSB MSB MSB MSB MSB MSB MSB D6 D5 D4 D3 D2 D1 D0 LSB LSB LSB LSB LSB LSB LSB LSB LSB LSB LSB LSB 0xFF Ports P0 through P3 level or PWM Port P0 level or PWM Ports P4 through P7 level or PWM Port P4 level or PWM Ports P8, P9 level, or PWM Port P8 level or PWM LSB LSB LSB LSB LSB LSB 0x00 to OUTPUT P0 LEVEL AND PWM Port P1 level or PWM Port P2 level or PWM Port P3 level or PWM Port P4 level or PWM Port P5 level or PWM Port P6 level or PWM Port P7 level or PWM Port P8 level or PWM Port P9 level or PWM Ports P0 through P9 level or PWM Port P0 level or PWM HEX
16
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10-Port Constant-Current LED Drivers and I/O Expanders with PWM Intensity Control
Output Current Registers
Each output port's individual constant-current sink can be set to be either half or full global current. The individual currents are set by the output current registers (Table 7). The global current is set by the global current register (Table 8). Each output current can be set individually to best suit the maximum operating current of an LED load, or even adjusted on the fly to double the effective intensity control range of each output. When the global current register is set to maximum, the individual current selection is 10mA (half) or 20mA (full).
MAX6966/MAX6967
Table 7. Output Current Register Format
REGISTER OUTPUT CURRENT IOUT70 Output P0 is set to half constant current Output P0 is set to full constant current Output P1 is set to half constant current Output P1 is set to full constant current Output P2 is set to half constant current Output P2 is set to full constant current Output P3 is set to half constant current Output P3 is set to full constant current Output P4 is set to half constant current Output P4 is set to full constant current Output P5 is set to half constant current Output P5 is set to full constant current Output P6 is set to half constant current Output P6 is set to full constant current Output P7 is set to half constant current Output P7 is set to full constant current R/W X X X X X X X X X X X X X X X X X 0 1 X X X X 0x14 0x13 ADDRESS CODE (HEX) REGISTER DATA D7 IOUT 7 X X X X X X X X X X X X X X 0 1 X 0 X X X X D6 IOUT 6 X X X X X X X X X X X X 0 1 X X X 0 X X X X D5 IOUT 5 X X X X X X X X X X 0 1 X X X X X 0 X X X X D4 IOUT 4 X X X X X X X X 0 1 X X X X X X X 0 X X X X D3 IOUT 3 X X X X X X 0 1 X X X X X X X X X 0 X X X X D2 IOUT 2 X X X X 0 1 X X X X X X X X X X X 0 X X X X D1 IOUT 1 X X 0 1 X X X X X X X X X X X X D0 IOUT 0 0 1 X X X X X X X X X X X X X X
OUTPUT CURRENT IOUT98 Output P8 is set to half constant current Output P8 is set to full constant current Output P9 is set to half constant current Output P9 is set to full constant current
IOUT9 IOUT8 IOUT9 IOUT8 X X 0 1 0 1 X X
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17
10-Port Constant-Current LED Drivers and I/O Expanders with PWM Intensity Control MAX6966/MAX6967
Table 8. Global Current Register Format
REGISTER GLOBAL CURRENT Full current is 2.5mA; half current is 1.25mA Full current is 5mA; half current is 2.5mA Full current is 7.5mA; half current is 3.75mA Full current is 10mA; half current is 5mA Full current is 12.5mA; half current is 6.25mA Full current is 15mA; half current is 7.5mA Full current is 17.5mA; half current is 8.75mA Full current is 20mA; half current is 10mA R/W 0 1 X X X X X X X X 0x15 ADDRESS CODE (HEX) REGISTER DATA D7 X 0 X X X X X X X X D6 X 0 X X X X X X X X D5 X 0 X X X X X X X X D4 X 0 X X X X X X X X D3 X 0 X X X X X X X X D2 D1 D0 ISET2 ISET1 ISET0 ISET2 ISET1 ISET0 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1
Global Current Register
The global current register sets the full (maximum) constant current sunk into an I/O port (Table 8). Each output port's individual constant-current sink can be set to be either half or full global current by the output current registers (Table 7). By default, maximum current is 20mA, so the default half current is 10mA.
1/8s 1/16s 1/4s 1/2s
ZERO TO 4s CURRENT RAMP-UP AFTER CS RUN
1s
2s
4s
Ramp-Up and Ramp-Down Controls
The MAX6966/MAX6967 provide automatic controls that allow the currents' outputs to be ramped down into automatic shutdown (ramp-down), and ramped up again out of shutdown (ramp-up) without further interaction (Figures 4 and 5). Ramp-down comprises a programmable hold-off delay, which also maintains the outputs at full current for a time before the programmed
EXIT SHUTDOWN COMMAND
Figure 4. Ramp-Up Behavior
fade-off time, during which the currents' outputs are ramped down.
ZERO TO 8s CURRENT RAMP-DOWN ZERO TO 4s HOLD-OFF DELAY BEFORE FADE-OFF ZERO TO 4s CURRENT FADE-OFF AFTER HOLD-OFF DELAY
1/4s 1/2s 1/8s 1/16s
1s
2s
4s 1/4s 1/2s 1/8s 1/16s
1s
2s
4s
Figure 5. Ramp-Down, Hold-Off, and Fade-Off Behavior 18 ______________________________________________________________________________________
10-Port Constant-Current LED Drivers and I/O Expanders with PWM Intensity Control
The ramp-down register sets the hold-off and fade-off times and allows hold-off and fade-off to be disabled (zero delay), if desired (Table 9). The ramp-up register sets the ramp-up time and allows ramp-up to be disabled (zero delay), if desired (Table 10). The configuration register contains 3 status bits that identify whether the MAX6966/MAX6967 are in hold-off, fade-off, or rampup condition (Table 4). The configuration register also enables or disables ramp-up. One write to the configuration register can put the MAX6966/MAX6967 into shutdown (using hold-off and fade-off settings in the fade register) and determine whether CS run is enabled for restart, and whether ramp-up is to be used for restart.
MAX6966/MAX6967
Table 9. Ramp-Down Register Format
REGISTER Write ramp-down Read ramp-down Fade-off time (fPWM = 32768Hz) Instant going into shutdown after hold-off delay 1/16s ramp-down from full current before shutdown after hold-off delay 1/8s ramp-down from full current before shutdown after hold-off delay 1/4s ramp-down from full current before shutdown after hold-off delay 1/2s ramp-down from full current before shutdown after hold-off delay 1s ramp-down from full current before shutdown after hold-off delay 2s ramp-down from full current before shutdown after hold-off delay 4s ramp-down from full current before shutdown after hold-off delay Hold-off time (fPWM = 32768Hz) Zero hold-off delay before fade-off going into shutdown 1/16s hold-off delay before fade-off going into shutdown 1/8s hold-off delay before fade-off going into shutdown 1/4s hold-off delay before fade-off going into shutdown 1/2s hold-off delay before fade-off going into shutdown 1s hold-off delay before fade-off going into shutdown 2s hold-off delay before fade-off going into shutdown 4s hold-off delay before fade-off going into shutdown X X X X X X X X X X X X X X X X X X X X X X X X 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 R/W 0 1 ADDRESS CODE (HEX) REGISTER DATA D7 X 0 D6 X 0 D5 D4 Hold-off D3 D2 D1 Fade-off D0
0x11
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19
10-Port Constant-Current LED Drivers and I/O Expanders with PWM Intensity Control MAX6966/MAX6967
Table 10. Ramp-Up Register Format
REGISTER Write ramp-up Read ramp-up Ramp-up time (fPWM = 32768Hz) Instant full current coming out from shutdown 1/16s ramp-up to full current coming out from shutdown 1/8s ramp-up to full current coming out from shutdown 1/4s ramp-up to full current coming out from shutdown 1/2s ramp-up to full current coming out from shutdown 1s ramp-up to full current coming out from shutdown 2s ramp-up to full current coming out from shutdown 4s ramp-up to full current coming out from shutdown X X X X X X X X R/W 0 1 0x12 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 ADDRESS CODE (HEX) REGISTER DATA D7 X 0 D6 X 0 D5 X 0 D4 X 0 D3 X 0 D2 D1 Ramp-up D0
Ramp-up and ramp-down use the PWM clock for timing. If the external oscillator is selected, then this clock should be provided until the end of the sequence. If the internal oscillator is selected, it always runs during a fade sequence, even if none of the ports are using PWM. The ramp-up and ramp-down circuit operates a 3-bit DAC. The DAC adjusts the internal current reference used to set the constant-current outputs in a similar manner to the global current register (Table 8). Because it is the master current reference that is scaled, all output constant-current and PWM settings
are adjusted at the same ratio with respect to each other. This means that LEDs are always faded at the same rate even if their different intensity settings are totally different. Figure 6 shows output fade DAC. The maximum port output current set by the global current register (Table 8) also sets the point during rampdown that the current starts falling, and the point during ramp-up that the current stops rising. Figure 7 shows the ramp waveforms that occur with different global current register settings.
CURRENT PORT CURRENT = FULL 20mA
CURRENT GLOBAL CURRENT = 0x07 20mA GLOBAL CURRENT = 0x06
17.5mA
17.5mA
15mA
15mA
GLOBAL CURRENT = 0x05
12.5mA
12.5mA PORT CURRENT = HALF 10mA
GLOBAL CURRENT = 0x04
10mA
GLOBAL CURRENT = 0x03
7.5mA
7.5mA 5mA
GLOBAL CURRENT = 0x02
5mA
GLOBAL CURRENT = 0x01
2.5mA
2.5mA
FULL CURRENT 7/8 CURRENT 6/8 CURRENT 5/8 CURRENT 4/8 CURRENT 3/8 CURRENT 2/8 CURRENT FADE-OFF 1/8 ZERO CURRENT CURRENT
GLOBAL CURRENT = 0x00
0mA
0mA
FADE-UP
ZERO 4/8 2/8 3/8 1/8 6/8 7/8 5/8 FULL CURRENT CURRENT CURRENT CURRENT CURRENT CURRENT CURRENT CURRENT CURRENT
FADE-UP
FADE-OFF
Figure 6. Output Fade DAC (Global Current = 0x07) 20
Figure 7. Global Current Modifies Fade Behavior
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10-Port Constant-Current LED Drivers and I/O Expanders with PWM Intensity Control
Serial Interface
The MAX6966/MAX6967 communicate through an SPIcompatible 4-wire serial interface. The interface has three inputs: clock (SCLK), chip select (CS), and data in (DIN), and one output, data out (DOUT). CS must be low to clock data into or out of the device, and DIN must be stable when sampled on the rising edge of SCLK. DOUT is stable on the rising edge of SCLK. Note that the SPI protocol expects DOUT to be high impedance when the MAX6966/MAX6967 are not being accessed; DOUT on the MAX6966/MAX6967 is never high impedance. Go to www.maxim-ic.com/an1879 for ways to convert the MAX6966/MAX6967 to tri-state, if required. SCLK and DIN can be used to transmit data to other peripherals. The MAX6966/MAX6967 ignore all activity on SCLK and DIN except when CS is low.
Control and Operation Using the 4-Wire Interface
Controlling the MAX6966/MAX6967 requires sending a 16-bit word. The first byte, D15 through D8, is the command, and the second byte, D7 through D0, is the data byte (Table 11).
MAX6966/MAX6967
Connecting Multiple MAX6966/MAX6967s to the 4-Wire Bus
Multiple MAX6966/MAX6967s can be interfaced to a common SPI bus by connecting DIN inputs together, connecting SCLK inputs together, and providing an individual CS per MAX6966/MAX6967 device (Figure 8). This connection works regardless of the configuration of DOUT/OSC, but does not allow the MAX6966/ MAX6967s to be read.
Table 11. Serial-Data Format
D15 R/W D14 MSB D13 D12 D11 ADDRESS D10 D9 D8 LSB D7 MSB D6 D5 D4 D3 D2 D1 D0 LSB DATA
CS3 CS2 C CS1 MOSI SCLK CS1 DIN SCLK
MAX6966 MAX6967
CS2 DIN SCLK
MAX6966 MAX6967
CS3 DIN SCLK
MAX6966 MAX6967
Figure 8. MAX6966/MAX6967 Multiple CS Connection
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21
10-Port Constant-Current LED Drivers and I/O Expanders with PWM Intensity Control MAX6966/MAX6967
Alternatively, the MAX6966/MAX6967s can be daisychained by connecting the DOUT of one device to the DIN of the next, and driving SCLK and CS lines in parallel (Figure 9). This connection allows the MAX6966/ MAX6967s to be read. Data at DIN propagates through the internal shift registers and appears at DOUT 15.5 clock cycles later, clocked out on the falling edge of SCLK. When sending commands to daisy-chained MAX6966/MAX6967s, all devices are accessed at the same time. An access requires (16 x n) clock cycles, where n is the number of MAX6966/MAX6967s connected together. For daisy-chaining to work, DOUT/OSC must be configured as DOUT by clearing configuration register bit D7 to zero (Table 4). Note that the MAX6966 powers up with DOUT/OSC configured as DOUT output by default, while the MAX6967 powers up with DOUT/OSC configured as OSC input by default. The serial-interface speed (maximum SCLK) is limited to 17.5MHz when multiple devices are daisy-chained due to the DOUT propagation delay and DIN setup time. Figure 10 is the timing diagram.
MOSI CS C SCLK
DIN CS
DOUT
DIN CS SCLK
DOUT
DIN CS
DOUT
MAX6966 SCLK MAX6967
MAX6966 MAX6967
SCLK
MAX6966 MAX6967
MISO
Figure 9. MAX6966/MAX6967 Daisy-Chain Connection
CS tCSW tCL tCSS SCLK tCH tCP tCSH
tDS tDH DIN D15 D14 D1 D0
tDO
DOUT
D15
Figure 10. Timing Diagram 22 ______________________________________________________________________________________
10-Port Constant-Current LED Drivers and I/O Expanders with PWM Intensity Control
The MAX6966/MAX6967 are written to using the following sequence (Figure 11): 1) Take SCLK low. 2) Take CS low. This enables the internal 16-bit shift register. 3) Clock 16 bits of data into DIN, D15 first to D0 last, observing the setup and hold times. Bit D15 is low, indicating a write command. 4) Take CS high (either while SCLK is still high after clocking in the last data bit, or after taking SCLK low). 5) Take SCLK low (if not already low). If fewer or greater than 16 bits are clocked into the MAX6966/MAX6967 between taking CS low and taking CS high again, the MAX6966/MAX6967 store the last 16 bits received, including the previous transmission(s). The general case is when n bits (where n > 16) are transmitted to the MAX6966/MAX6967. The last bits comprising bits {n-15} to {n}, are retained, and are parallel loaded into the 16-bit latch as bits D15 to D0, respectively (Figure 12).
Reading Device Registers
Any register data within the MAX6966/MAX6967 can be read by sending a logic high to bit D15. The sequence is: 1) Take SCLK low. 2) Take CS low. This enables the internal 16-bit shift register. 3) Clock 16 bits of data into DIN, D15 first to D0 last. D15 is high, indicating a read command and bits D14 through D8 contain the address of the register to read. Bits D7 to D0 contain dummy data, which is discarded. 4) Take CS high (either while SCLK is still high after clocking in the last data bit, or after taking SCLK low). Positions D7 through D0 in the shift register are now loaded with the register data addressed by bits D15 through D8. 5) Take SCLK low (if not already low). 6) Issue another read or write command, and examine the bit stream at DOUT; the second 8 bits are the contents of the register addressed by bits D14 through D8 in step 3).
MAX6966/MAX6967
CS
SCLK
D15 =0
DIN
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
DOUT
.
D15 = 0
Figure 11. 16-Bit Write Transmission to the MAX6966/MAX6967
CS
SCLK
BIT 1 BIT 2
DIN
N-15
N-14
N-13
N-12
N-11
N-10
N-9
N-8
N-7
N-6
N-5
N-4
N-3
N-2
N-1
N
DOUT
N-31
N-30
N-29
N-28
N-27
N-26
N-25
N-24
N-23
.
N-22
N-21
N-20
N-19
N-18
N-17
N-16
Figure 12. Transmission of More than 16 Bits to the MAX6966/MAX6967 ______________________________________________________________________________________ 23
10-Port Constant-Current LED Drivers and I/O Expanders with PWM Intensity Control MAX6966/MAX6967
Applications Information
Hot Insertion
The I/O ports P0-P9 remain high impedance with up to 8V asserted on them when the MAX6966/MAX6967 are powered down (V+ = 0V). The MAX6966/MAX6967 can therefore be used in hot-swap applications. In most applications, the software can be written so that either MAX6966 or MAX6967 can be fitted, and DOUT/OSC is configured appropriately on power-up. If DOUT/OSC is used as OSC, fit a series resistor between the PWM clock source and DOUT/OSC pin. A resistor value of 2.2k is recommended as a starting point, but other values may be more suitable depending on the serial-interface speed and clock-source drive capability. This limits the loading on the PWM clock source on power-up when a MAX6966 is fitted, because DOUT/OSC initializes as an output. If DOUT/OSC is used as DOUT, remember that a MAX6967 cannot be read after power-up until DOUT/OSC has been reconfigured from OSC to DOUT.
SPI Routing Considerations
The MAX6966/MAX6967s' SPI interface is guaranteed to operate at 26Mbps on a 2.5V supply, and on a 3.3V supply typically operate at 35Mbps. This means that transmission-line issues should be considered when the interface connections are longer than 100mm, particularly with higher supply voltages. Avoid running long adjacent tracks for SCLK, DIN, and CS without interleaving GND traces; otherwise, the signals may cross-couple, giving false clock or chip-select transitions. Ringing may manifest itself as communication issues, often intermittent, typically due to double clocking due to ringing at the SCLK input. Fit a 1k to 10k parallel termination resistor to either GND or V+ at the DIN, SCLK, and CS inputs to damp ringing for moderately long interface runs. Use line-impedance matching terminations when making connections between boards.
Driving LEDs into Brownout
The MAX6966/MAX6967 correctly regulate the constant-current outputs, provided there is a minimum voltage drop across the port output. This port output voltage is the difference between the load (typically LED) supply and the load voltage drop (LED forward voltage). If the LED supply drops so that the minimum port output voltage is not maintained, the driver output stages brownout and the load current falls. The minimum port voltage is approximately 0.5V at 10mA sink current, and approximately 1V at 20mA sink current. In battery applications, it may be important to operate the LEDs directly from a battery supply. For example, the LED supply voltage could be a single rechargeable Li+ battery with a maximum terminal voltage of 4.2V on charge, 3.4V to 3.7V most of the time, and down to 3V when discharged. In this scenario, the LED supply falls significantly below the brownout point when the battery is at end-of-life voltage.
Differences Between the MAX6966 and MAX6967
The MAX6966 powers up with DOUT/OSC configured as DOUT output by default. The MAX6967 powers up with DOUT/OSC configured as OSC input by default. Both parts allow the DOUT/OSC pin function to be changed through the configuration register (Table 4). If any port is used as a logic input, then configure DOUT/OSC as DOUT to allow the MAX6966/MAX6967 to be read.
24
______________________________________________________________________________________
10-Port Constant-Current LED Drivers and I/O Expanders with PWM Intensity Control
Figure 13 shows the typical current sunk by a LITEON LTST-C170TBKT 3.0V blue LED as the LED supply voltage is varied from 2.5V to 7V. The LED currents shown are for ports programmed for 10mA and 20mA constant current, swept over a 2.5V to 7V LED supply voltage range. It can be seen that the LED forward voltage falls with current, allowing the LED current to fall gracefully, not abruptly, in brownout. In practice, the LED current drops to 6mA to 7mA at a 3V LED supply voltage, which is an acceptable performance at end-of-life in many backlight applications.
Using Stagger with Fewer Ports
The stagger option, when selected, applies to all ports configured as constant-current outputs. The 10 ports' PWM cycles are separated to eight evenly spaced start positions (Figure 3). This phasing can be optimized if fewer than 10 ports are used as constant-current outputs by allocating the ports with the most appropriate start positions. If eight constant-current outputs are needed, choose P0-P7 because these all have different PWM start positions. If four constant-current outputs are needed, choose P0, P2, P4, P6 or P1, P3, P5, P7 because the PWM start positions are evenly spaced. In general, choose the ports that spread the PWM start positions as evenly as possible. This optimally spreads out the current demand from the ports' load supply.
MAX6966/MAX6967
Output Level Translation
The open-drain output architecture allows the ports to level translate the outputs to higher or lower voltages than the MAX6966/MAX6967 supply. An external pullup resistor can be used on any output to convert the highimpedance logic-high condition to a positive voltage level. The resistor can be connected to any voltage up to 7V. When using a pullup on a constant-current output, select the resistor value to sink no more than a few hundred A in logic-low condition. This ensures that the current sink output saturates close to GND. For interfacing CMOS inputs, a pullup resistor value of 220k is a good starting point. Use a lower resistance to improve noise immunity in applications where power consumption is less critical, or where a faster rise time is needed for a given capacitive load.
Generating a Shutdown/Run Output
An I/O port can be used to automatically generate a shutdown/run output from the MAX6966/MAX6967. The shutdown/run output is active low when the MAX6966/MAX6967 are in run mode, hold-off, fade-off, or ramp-up, and go high automatically when the MAX6966/MAX6967 finally enter shutdown after fadeoff. Program the port's output register to value 0x00, which puts the output into static constant-current mode (Table 6). Program the port's output current register to half current (Table 7) to minimize operating current. Fit a 220k pullup resistor to this port.
VLED vs. VLED SUPPLY
3.05 3.00 2.95 2.90 ILED (mA) 2.85 VLED (V) 2.80 2.75 2.70 2.65 2.60 2.55 2.50 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 VLED SUPPLY (V) 20 18 16 14 12 10 8 6 4 2 0
ILED vs. VLED SUPPLY
2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 VLED SUPPLY (V)
Figure 13. LED Brownout
______________________________________________________________________________________
25
10-Port Constant-Current LED Drivers and I/O Expanders with PWM Intensity Control MAX6966/MAX6967
In run mode, the output port goes low, approaching 0V, as the port's static constant current saturates trying to sink a higher current than the 220k pullup resistor can source. In shutdown mode, the output goes high impedance together with any other constant-current outputs. This output remains low during ramp-up and fade-down sequences because the current drawn by the 220k pullup resistor is much smaller than the available output constant current, even at the lowest fade current step. be driven using ports P0, P1, P2, and P3 connected in parallel (shorted together). Three of the ports should be configured for full current (20mA), and the last port should be configured for half current (10mA) to meet the 70mA requirement. The four ports can be controlled simultaneously with one write access using register 0x0B (Table 6). Note that because the output ports have current limiting, they do not have to be switched simultaneously to ensure safe current sharing.
Power-Supply Considerations
The MAX6966/MAX6967 operate with a power-supply voltage of 2.25V to 3.6V. Bypass the power supply to GND with a 0.1F ceramic capacitor as close to the device as possible. For the TQFN version, connect the underside exposed pad to GND.
Driving Load Currents Higher than 20mA
The MAX6966/MAX6967 can be used to drive loads needing more than 20mA, like high-current white LEDs, by paralleling outputs. For example, consider a white LED that needs to be driven with 70mA. This LED can
Typical Application Circuit
+3.3V
+5V D1 V+ C SCLK MOSI MISO CS SCLK DIN DOUT CS
+5V D2
+5V D3
MAX6966
GND
P0 P1 P2 P3 P4 P5 P6 P7 P8 P9
LOGIC INPUT
Pin Configurations
TOP VIEW
DOUT/OSC
P9
P8
P7
12 DIN V+ SCLK CS 13 14 15 16 1 P0
11
10
9 8 7 P6 P5 GND P4
SCLK 1 CS 2 P0 3 P1 4 P2 5 P3 6 P4 7 GND 8
16 V+ 15 DIN 14 DOUT/OSC
MAX6966ATE MAX6967ATE
6 5
MAX6966ATE MAX6967ATE
13 P9 12 P8 11 P7 10 P6 9 P5
2
P1
3 P2
4 P3
THIN QFN
QSOP
26
______________________________________________________________________________________
10-Port Constant-Current LED Drivers and I/O Expanders with PWM Intensity Control
Block Diagram
MAX6966/MAX6967
CURRENT REFERENCE
RAMP-UP/RAMP-DOWN CONTROLS P0
INTERNAL OSCILLATOR
PWM CONTROLLER I/O PORTS
P1 P2 P3 P4 P5 P6 P7 P8 P9
OSC
EXTERNAL CLOCK INPUT
CONFIGURATION REGISTER
I/O REGISTER
CLK CS DIN DOUT
4-WIRE SERIAL INTERFACE
Chip Information
TRANSISTOR COUNT: 14,865 PROCESS: BiCMOS
______________________________________________________________________________________
27
10-Port Constant-Current LED Drivers and I/O Expanders with PWM Intensity Control MAX6966/MAX6967
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
QSOP.EPS
PACKAGE OUTLINE, QSOP .150", .025" LEAD PITCH
21-0055
E
1
1
28
______________________________________________________________________________________
10-Port Constant-Current LED Drivers and I/O Expanders with PWM Intensity Control
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
12x16L QFN THIN.EPS
MAX6966/MAX6967 MAX6966/MAX6967 MAX6966/MAX6967
D2 b
0.10 M C A B
D D/2
D2/2
E/2
E2/2
C L
E
(NE - 1) X e
E2
L
C L
e
k (ND - 1) X e
C L
0.10 C 0.08 C A A2 A1 L
C L
L
e
e
PACKAGE OUTLINE 12, 16L, THIN QFN, 3x3x0.8mm
21-0136
E
1
2
PKG REF. A b D E e L N ND NE A1 A2 k 0.25 0 MIN. 0.70 0.20 2.90 2.90 0.45
12L 3x3 NOM. 0.75 0.25 3.00 3.00 0.50 BSC. 0.55 12 3 3 0.02 0.20 REF 0.05 0 0.25 0.65 0.30 MAX. 0.80 0.30 3.10 3.10 MIN. 0.70 0.20 2.90 2.90
16L 3x3 NOM. 0.75 0.25 3.00 3.00 0.50 BSC. 0.40 16 4 4 0.02 0.20 REF 0.05 0.50 MAX. 0.80 0.30 3.10 3.10 PKG. CODES T1233-1 T1233-3 T1633-1 T1633-2 T1633F-3 T1633-4
EXPOSED PAD VARIATIONS
D2 MIN. 0.95 0.95 0.95 0.95 0.65 0.95 NOM. 1.10 1.10 1.10 1.10 0.80 1.10 MAX. 1.25 1.25 1.25 1.25 0.95 1.25 MIN. 0.95 0.95 0.95 0.95 0.65 0.95 E2 NOM. MAX. 1.10 1.10 1.10 1.10 0.80 1.10 1.25 1.25 1.25 1.25 0.95 1.25 PIN ID 0.35 x 45 0.35 x 45 0.35 x 45 0.35 x 45 JEDEC WEED-1 WEED-1 WEED-2 WEED-2
DOWN BONDS ALLOWED
NO YES NO YES N/A NO
0.225 x 45 WEED-2 0.35 x 45 WEED-2
NOTES: 1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994. 2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES. 3. N IS THE TOTAL NUMBER OF TERMINALS. 4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE. 5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.20 mm AND 0.25 mm FROM TERMINAL TIP. 6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY. 7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION. 8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS. 9. DRAWING CONFORMS TO JEDEC MO220 REVISION C.
PACKAGE OUTLINE 12, 16L, THIN QFN, 3x3x0.8mm
21-0136
E
2
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 29 (c) 2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.

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